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Precision Multiferroic II Ferroelectric Tester
The Precision Multiferroic II Ferroelectric Tester is the most advanced test system
on
the market. The Multiferroic II has a unique frequency rating of 270KHz at +/-100V
built-in to the system. The Multiferroic II tester makes testing of thin films and
bulk ceramics a fast and simple process. It captures 32,000 points at 2 MHz to
achieve
exquisite frequency resolution in DLTS or PAINT measurements.
The Precision Multiferroic II is offered with a variety of internal amplifiers. The
Multiferroic II is offered with a ±100V, 200V and 500V built-in drive volt
option. The
Multiferroic II can be expanded to 10kV with the addition of a high voltage
interface and
an amplifier.
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| Tester Parameter | Multiferroic II |
| Voltage Range (built-in drive voltage) | ±10V, ±30V, ±100V, ±200V or ±500V built-in |
| Voltage Range with an external amplifier and high voltage interface (HVI) | 10KV |
| Number of ADC Bits | 18 |
| Minimum Charge Resolution | 0.80fC |
| Minimum Area Resolution (assuming 1 ADC bit = 1μC/cm2) | 0.080μ2 |
| Maximum Charge Resolution | 5.26mC |
| Maximum Area Resolution (assuming saturation polarization = 100μC/cm2) | 52.6cm2 |
| Maximum Charge Resolution with High Voltage Interface (HVI) | 526mC |
| Maximum Area Resolution (assuming saturation polarization = 100μC/cm2) w/o HVI | >100cm2 |
| Maximum Hysteresis Frequency | 270KHz @ +/-100V 100KHz @ +/-200V 5KHz @+/- 500V |
| Minimum Hysteresis Frequency | 0.03Hz |
| Minimum Pulse Width | 0.5μs |
| Minimum Pulse Rise Time (5V) | 400ns |
| Maximum Pulse Width | 1s |
| Maximum Delay between Pulses | 40ks |
| Internal Clock | 25ns |
| Minimum Leakage Current (assuming max current integration period = 1 seconds) | 1pA |
| Maximum Small Signal Cap Frequency | 1MHz |
| Minimum Small Signal Cap Frequency | 1Hz |
| Output Rise Time Control | 105 scaling |
| Input Capacitance | -6fF |
| Electrometer Input All Test Frequencies for all test at any speed | Yes |
| * The minimum area resolution under actual test conditions depends upon the internal noise environment of the tester, the external noise environment, and the test jig parasitic capacitance. | |
| *** Tester specifications are subject to change without notice. | |